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MIPS Technologies joins RISC-V, moves to open-source ISA standard (tuxphones.com)
L 16 pts 2 comments by SoapDog Mar 8, 2021 hardware thread

Stories related to "MIPS Technologies joins RISC-V, moves to open-source ISA standard" across the full archive.

MIPS Technologies joins RISC-V, moves to open-source ISA standard (tuxphones.com)
L 16 pts 2 comments by SoapDog Mar 8, 2021 hardware Systems / Low-Level / OSProgramming (General)Maker / DIY / Hardware thread
ISA Semantics for ARMv8-A, RISC-V, and CHERI-MIPS (alastairreid.github.io)
L 9 pts 0 comments by mjn Nov 11, 2018 formalmethodshardware Systems / Low-Level / OSProgramming Languages / CS TheoryMaker / DIY / Hardware thread
ISA Semantics for ARMv8-A, RISC-V, and CHERI-MIPS (cl.cam.ac.uk)
L 4 pts 0 comments by GeoffWozniak Jan 14, 2019 formalmethodspdf Systems / Low-Level / OSProgramming Languages / CS Theory thread
Associated Github [repository](https://github.com/rems-project/sail-arm). Site for the [Sail language](https://www.cl.cam.ac.uk/~pes20/sail/) used in the paper.
Red Hat Joins The RISC-V Foundation - Phoronix (phoronix.com)
L 6 pts 0 comments by Yogthos Aug 8, 2019 hardware Systems / Low-Level / OSMaker / DIY / Hardware thread
MRISC32 conditional moves (bitsnbites.eu)
L 4 pts 0 comments by raymii Sep 20, 2020 assembly Systems / Low-Level / OS thread
Wave Computing Rebrands to MIPS, Embraces RISC-V For Next-Gen Cores (abopen.com)
L 8 pts 7 comments by brucehoult Mar 6, 2021 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
Porting OpenBSD to RISC-V Final Report (github.com)
L 18 pts 1 comments by napkindrawing Mar 16, 2021 openbsdpdf Systems / Low-Level / OS thread
Initial Support for the riscv64 Architecture (undeadly.org)
L 36 pts 1 comments by napkindrawing Apr 23, 2021 openbsd Systems / Low-Level / OS thread
Progress in support for the riscv64 platform (undeadly.org)
L 10 pts 0 comments by napkindrawing Jun 21, 2021 openbsd Systems / Low-Level / OS thread
Let's install OpenBSD/riscv64 on QEMU (briancallahan.net)
L 16 pts 3 comments by PengouinBSD Apr 19, 2022 openbsdvirtualization Systems / Low-Level / OS thread
Viable ROP-free roadmap for i386/armv8/riscv64/alpha/sparc64 (marc.info)
L 28 pts 9 comments by calvin Sep 25, 2023 openbsdsecurity Systems / Low-Level / OSSecurity / Privacy thread
DeepComputing launches early access program for DC-ROMA RISC-V Mainboard for Framework Laptop 13
~ 4 pts 6 comments by unknown Nov 21, 2024 ~comphardwareopen_source Programming (General) thread
MIPS P8700 RISC-V CPU Support Posted for LLVM Compiler (phoronix.com)
HN 3 pts 2 comments by rbanffy Nov 27, 2024 Systems / Low-Level / OS thread
Migrating the CPU IP Development from MIPS to RISC-V (mips.com)
HN 3 pts 0 comments by sandwichsphinx Dec 10, 2024 Systems / Low-Level / OS thread
RISC-V is making moves, but it has work to do if it wants to hit the mainstream (theregister.com)
HN 18 pts 20 comments by pseudolus Jan 2, 2025 thread
T1: a RISC-V Vector processor implementation
~ 8 pts 1 comments by unknown Feb 2, 2025 ~compopen_sourcehardware Programming (General) thread
Jim Keller joins ex-Intel chip designers in RISC-V startup (tomshardware.com)
HN 8 pts 1 comments by de6u99er Feb 26, 2025 Productivity / Career / Business thread
Jim Keller joins ex-Intel chip designers in RISC-V startup (tomshardware.com)
HN 5 pts 1 comments by Ozarkian Feb 27, 2025 Productivity / Career / Business thread
Why ZKM Chose MIPS32r2 over RISC-V for ZkMIPS (zkm.io)
HN 2 pts 0 comments by BrotherBen Apr 30, 2025 thread
Debian 13 "Trixie" Now in Hard Freeze: MIPS64EL Demoted, RISC-V 64-Bit Promoted (phoronix.com)
HN 4 pts 0 comments by Bender May 18, 2025 thread
Open Source Web IDE for Assembly RISC-V, M68K, x86, MIPS (asm-editor.specy.app)
HN 4 pts 1 comments by specy May 28, 2025 Systems / Low-Level / OSProgramming (General) thread
Porting OpenBSD to RISC-V ISA (2020) (openbsd.org)
L 10 pts 0 comments by mjturner Jul 3, 2025 openbsdpdf Systems / Low-Level / OS thread
The RISC-V ISA shows significant promise as an upcoming, flexible ISA for general purpose computing. However, adoption of RISC-V is largely hindered by lack of software support, particularly among popular operating systems. Only a few operating systems, including Linux and FreeBSD, have been updated...
Modern webapp to write, run and learn M68K, MIPS, RISC-V, x86 assembly code (github.com)
HN 3 pts 0 comments by hggh Jul 14, 2025 Web DevelopmentSystems / Low-Level / OS thread
MIPS: The hyperactive history and legacy of the pioneering RISC architecture (thechipletter.substack.com)
HN 12 pts 7 comments by rob_lh Jul 19, 2025 thread
MIPS – The hyperactive history and legacy of the pioneering RISC architecture (thechipletter.substack.com)
HN 9 pts 0 comments by rbanffy Jul 19, 2025 thread
MIPS – The hyperactive history and legacy of the pioneering RISC architecture (thechipletter.substack.com)
HN 75 pts 27 comments by rbanffy Jul 21, 2025 thread
Performance from architecture: comparing a RISC (MIPS) and a CISC (VAX) with SIM (dl.acm.org)
HN 3 pts 0 comments by fanf2 Sep 26, 2025 thread
RISC-V Conditional Moves (corsix.org)
HN 5 pts 0 comments by ingve Sep 28, 2025 thread
RISC-V Conditional Moves (corsix.org)
L 19 pts 4 comments by fanf Sep 28, 2025 assembly Systems / Low-Level / OS thread
Linux 6.17 release – Main changes, Arm, RISC-V, and MIPS architectures (cnx-software.com)
HN 1 pts 0 comments by transpute Sep 29, 2025 Systems / Low-Level / OS thread