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Gathering Intel on Intel AVX-512 Transitions (travisdowns.github.io)
L 12 pts 0 comments by BeeOnRope Jan 17, 2020 assemblyc++performance thread

Stories related to "Gathering Intel on Intel AVX-512 Transitions" across the full archive.

Gathering Intel on Intel AVX-512 Transitions (travisdowns.github.io)
L 12 pts 0 comments by BeeOnRope Jan 17, 2020 assemblyc++performance Systems / Low-Level / OSData / Databases / Infrastructure thread
Future instruction set: AVX-512 (agner.org)
L 5 pts 0 comments by inactive-user Oct 10, 2013 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
x86/x64 SIMD Instruction List (SSE to AVX512) (officedaytime.com)
L 3 pts 0 comments by nanxiao Oct 9, 2017 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
Program for AVX-512 instructions frequency impact evaluation (github.com)
L 4 pts 0 comments by quasilyte Sep 21, 2018 assemblygo Systems / Low-Level / OSProgramming (General) thread
Includes results for core i9 7900x: https://github.com/intel-go/avx512counters/blob/master/avx512_core_i9_7900x.csv
AVX512VBMI — remove spaces from text (0x80.pl)
L 16 pts 0 comments by calvin Jan 6, 2019 assembly Systems / Low-Level / OS thread
Visualizations of x86/x64 SIMD Instruction List (SSE to AVX512) (officedaytime.com)
L 5 pts 0 comments by friendlysock Feb 13, 2020 assemblyvisualization Systems / Low-Level / OSDesign / UX / Visualization thread
AVX-512 Mask Registers, Again (travisdowns.github.io)
L 3 pts 0 comments by calvin May 26, 2020 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
Ice Lake AVX-512 Downclocking (travisdowns.github.io)
L 3 pts 0 comments by icefox Aug 29, 2020 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
AVX / AVX2 / AVX-512 Performance + Power On Intel Rocket Lake (phoronix.com)
L 2 pts 0 comments by icefox Apr 7, 2021 hardwareperformance Data / Databases / InfrastructureMaker / DIY / Hardware thread
Benchmarking division and libdivide on Apple M1 and Intel AVX512 (ridiculousfish.com)
L 19 pts 3 comments by calvin May 13, 2021 performance Data / Databases / InfrastructureApple / macOS / iOS thread
Why Is AVX 512 Useful for RPCS3? (whatcookie.github.io)
L 7 pts 0 comments by calvin Jun 15, 2022 assembly Systems / Low-Level / OS thread
Filtering a Vector with SIMD Instructions (AVX-2 and AVX-512) (quickwit.io)
L 11 pts 0 comments by calvin Sep 1, 2022 assemblyrust Systems / Low-Level / OS thread
On AVX512 FP16, Alder Lake, custom kernels, and how "Mistakes were made" has never rang so true (gist.github.com)
L 7 pts 10 comments by calvin Oct 19, 2022 assemblyrant Systems / Low-Level / OS thread
SMACNI to AVX512 the life cycle of an instruction set (2019) (tomforsyth1000.github.io)
L 2 pts 0 comments by calvin Jan 23, 2023 assemblyhistoricalpdf Systems / Low-Level / OSCulture / Philosophy / History / Reading thread
A look inside `memcmp` on Intel AVX2 hardware (xoranth.net)
L 11 pts 1 comments by xoranth Jan 27, 2024 assemblyc Systems / Low-Level / OSMaker / DIY / Hardware thread
Intel Demonstrates Up to 48% Improvement for AVX-512 Optimized PostgreSQL (phoronix.com)
HN 4 pts 0 comments by pella Sep 12, 2024 Data / Databases / Infrastructure thread
Intel Demonstrates Up to 48% Improvement for AVX-512 Optimized PostgreSQL (phoronix.com)
HN 5 pts 0 comments by rbanffy Sep 13, 2024 Data / Databases / Infrastructure thread
Intel Demonstrates Up to 48% Improvement for AVX-512 Optimized PostgreSQL (phoronix.com)
HN 1 pts 4 comments by ksec Sep 14, 2024 Data / Databases / Infrastructure thread
New Intel Diamond Rapids Patch for GCC Confirms AVX10.2-512, APX, Other Features (phoronix.com)
HN 1 pts 0 comments by rbanffy Nov 1, 2024 thread
Intel Releases x86-SIMD-sort 6.0 For Speedy AVX2/AVX-512 Sorting (phoronix.com)
HN 2 pts 0 comments by mfiguiere Nov 4, 2024 Systems / Low-Level / OS thread
Intel Releases x86-SIMD-sort 6.0 for 10x faster AVX2/AVX-512 Sorting (phoronix.com)
HN 2 pts 1 comments by westurner Nov 5, 2024 Systems / Low-Level / OS thread
Using the most unhinged AVX-512 instruction to make the fastest phrase search algorithm (gab-menezes.github.io)
L 16 pts 0 comments by l1npengtul Jan 22, 2025 assemblyperformancerust Systems / Low-Level / OSProgramming Languages / CS TheoryData / Databases / Infrastructure thread
Intel announces 512-bit vector width support for AVX10 (inbox.sourceware.org)
HN 4 pts 2 comments by fweimer Mar 19, 2025 thread
Intel AVX10 Drops Optional 512-Bit: No AVX10 256-Bit Only E-Cores in the Future (phoronix.com)
HN 34 pts 20 comments by doener Mar 19, 2025 thread
Linux 6.15 CRC Code Should See Big Speed-Ups for Intel/AMD AVX-512 CPUs (phoronix.com)
HN 2 pts 1 comments by kristianp Mar 24, 2025 Systems / Low-Level / OS thread
Intel Nova Lake May Abandon AVX-512 and These Other CPU Instruction Sets (hothardware.com)
HN 4 pts 0 comments by rbanffy Oct 24, 2025 Systems / Low-Level / OS thread
Intel MMU's fault handling mechanism is Turing complete (github.com)
L 5 pts 0 comments by inactive-user Feb 22, 2013 assemblyc Systems / Low-Level / OSProgramming Languages / CS Theory thread
Intel i7 loop performance anomaly (eli.thegreenplace.net)
L 3 pts 0 comments by inactive-user Dec 6, 2013 assemblyhardware Systems / Low-Level / OSMaker / DIY / Hardware thread
Applying Artificial Intelligence to Nintendo Tetris (meatfighter.com)
L 16 pts 1 comments by pushcx Jan 29, 2014 assemblygames AI / Machine LearningSystems / Low-Level / OSGaming / Retro Computing thread
Introductory Intel x86: Architecture, Assembly, Applications, & Alliteration (opensecuritytraining.info)
L 1 pts 0 comments by tkozik Feb 27, 2014 assemblycreversing Systems / Low-Level / OS thread