🦞🌯 Lobster Roll

Thread

Memory mapping an FPGA from an STM32 (serd.es)

Stories related to "Memory mapping an FPGA from an STM32" across the full archive.

Memory Mapping an FPGA from an STM32 (serd.es)
Memory mapping an FPGA from an STM32 (serd.es)
lowRISC tagged memory preview release (FPGA-ready) (lowrisc.org)
Memory Mapping - Super Nintendo Entertainment System Features (youtube.com)
The case for mapping PCIe BARs as device memory on arm64 (threedots.ovh)
Weaving software into core memory by hand (youtube.com)
This is the memory used in the AGC (Apollo Guidance Computer).
How to start in FPGA development? (fpgarelated.com)
FPGA NES (danstrother.com)
Build your own FPGA (blog.notdot.net)
Video showing a DMA attack device, a live attack, and a defense with full-memory encryption (privatecore.com)
What Every Programmer Should Know About Memory - Ulrich Drepper (akkadia.org)
Where USB Memory Sticks are Born (bunniestudios.com)
Achieving maximum memory bandwidth (codearcana.com)
Busting 4 Modern Hardware Myths - Are Memory, HDDs, and SSDs Really Random Access? (highscalability.com)
[2007]: BORPH: An Operating System for FPGA-Based Reconfigurable Computers (eecs.berkeley.edu)
Intel Haswell DDR3 Memory Performance Impact On Graphics (phoronix.com)
Software Controls Cache Memory to Speed CPUs - IEEE Spectrum (spectrum.ieee.org)
FPGAs and Embedded Linux: A Series of Tutorials on using the Cyclone V SoC (zhehaomao.com)
What Every Programmer Should Know About Memory [2007] (akkadia.org)
FPGA MD5 Cracker (github.com)
**tl;dr** 32 FPGA MD5 units running at 50 MHz do 1000x **worse** than a single 2.7 GHz Xeon core. Oh well, I tried.
Real Time Audio Filters on the FPGA (github.com)
As part of my ongoing series on FPGA development, I played around with implementing real-time audio effects on the FPGA. The effect I'm using is an FIR low-pass filter + delay.
Atomic<> weapons: The C++11 Memory Model and Modern Hardware (concurrencyfreaks.blogspot.com)
Securing Non-Volatile Main Memory (citeseerx.ist.psu.edu)
FPGA Binning Co-processor for Apl (youtube.com)
Intel reveals its FrankenChip ARM killer: one FPGA and one Xeon IN ONE SOCKET (theregister.co.uk)
An Introduction To FPGA and CPLD (ureddit.com)
Eliminating Global Interpreter Locks in Ruby through Hardware Transactional Memory (PPoPP '14) (researcher.watson.ibm.com)
When I was in graduate school, transactional memory was an ivory tower pipe dream, but now it's something that actually exists in hardware you can buy. It seems worthwhile to start learning about how to use it.
An FPGA sprite graphics accelerator (andybrown.me.uk)
DRAM security threat: Flipping Bits in Memory Without Accessing Them (github.com)
Paper is in the repo, slides: http://users.ece.cmu.edu/~omutlu/pub/dram-row-hammer_kim_talk_isca14.pdf
Tagged memory and minion cores in the lowRISC SoC (lowrisc.org)
As background, the lowRISC project aims to produce a fully open-source SoC using the RISC-V instruction set architecture and bring it to volume production. We've just released this document to describe in more detail our plans for tagged memory (not exactly the rebirth of the LISP machine, but has u...